INPUTS
OUTPUT
Y
A
B
H
H
L
L
X
H
H
X
L
C
H
X
X
X
L
X
H
FEATURES:
. Patented technology
. Operating frequency up to
1GHz
with 2pf load
. Operating frequency up to 800MHz with 5pf load
. Operating frequency up to 350MHz with 15pf load
. VCC Operates from 1.65V to 3.6V
. Propagation delay < 1.7ns max with 15pf load
. Low input capacitance: 4pf typical
. Available in 14pin 150mil wide SOIC package
Pin Configuration
Logic Block Diagram
Pin Description
1
2
3
4
5
6
7
14
13
12
11
10
9
8
DESCRIPTION:
Potato Semiconductor’s PO74G10A is designed for
world top performance using submicron CMOS
technology to achieve 1GHz TTL /CMOS output
frequency with less than 1.7ns propagation delay.
This quadruple 2-input positive-NOR gate is designed
for 1.65-V to 3.6-V VCC operation.
The PO74G10A performs the Boolean function
Y= A · B · C or Y= A + B + C in positive logic.
Inputs can be driven from either 3.3V or 5V devices.
This feature allows the use of these devices as
translators in a mixed 3.3V/5V system environment.
1A
1B
2A
2B
2C
2Y
GND
V
CC
1C
1Y
3C
3B
3A
3Y
1A
1B
1C
1Y
2A
2B
2C
2Y
3A
3B
3C
3Y
TRIPLE 3-INPUT POSITIVE-NAND GATES
54, 74 Series Noise Cancellation GHz Logic
1
01/01/10
Potato Semiconductor Corporation
PO74G10A
www.potatosemi.com
Maximum Ratings
DC Electrical Characteristics
Symbol
Description
Test Conditions
Min
Typ
Max
Unit
V
OH
Output High voltage
Vcc=3V Vin=V
IH
or V
IL
, I
OH
= -12mA
2.4
3
-
V
V
OL
Output Low voltage
Vcc=3V Vin=V
IH
or V
IL
, I
OH
=12mA
-
0.3
0.5
V
V
IH
Input High voltage
Guaranteed Logic HIGH Level (Input Pin)
2
-
5.5
V
V
IL
Input Low voltage
Guaranteed Logic LOW Level (Input Pin)
-0.5
-
0.8
V
I
IH
Input High current
Vcc = 3.6V and Vin = 5.5V
-
-
1
uA
I
IL
Input Low current
Vcc = 3.6V and Vin = 0V
-
-
-1
uA
V
IK
Clamp diode voltage
Vcc = Min. And
I
IN
= -18mA
-
-0.7
-1.2
V
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2.
Typical values are at Vcc = 3.3V, 25
°
C ambient.
3.
This parameter is guaranteed but not tested.
4.
Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
5.
VoH = Vcc – 0.6V at rated current
Description
Max
Unit
Storage Temperature
-65 to 150
°
C
Operation Temperature
-40 to 85
°
C
Operation Voltage
-0.5 to +4.6
V
Input Voltage
-0.5 to +5.5
V
Output Voltage
-0.5 to Vcc+0.5
V
Note:
stresses greater than listed under
Maximum
Ratings
may
cause
permanent damage to the device. This
is a stress rating only and functional
operation of the device at these or any
other conditions above those indicated
in the operational sections of this
specification is not implied. Exposure
to absolute maximum rating conditions
for extended periods may affect
reliability specification is not implied.
TRIPLE 3-INPUT POSITIVE-NAND GATES
54, 74 Series Noise Cancellation GHz Logic
2
01/01/10
Potato Semiconductor Corporation
PO74G10A
www.potatosemi.com
Power Supply Characteristics
Symbol
Description
Test Conditions (1)
Min
Typ
Max
Unit
Icc
Q
Quiescent Power Supply Current
Vcc=Max, Vin=Vcc or GND
-
0.1
30
uA
Icc
Power Supply Current per Input High
Vcc=Max, Vin= Vcc-0.6V
-
50
300
uA
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, 25
°
C ambient.
3. This parameter is guaranteed but not tested.
4. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
5. VoH = Vcc – 0.6V at rated current
Capacitance
Parameters (1)
Description
Test Conditions
Typ
Unit
Cin
Input Capacitance
Vin = 0V
4
pF
Cout
Output Capacitance
Vout = 0V
6
pF
Notes:
1 This parameter is determined by device characterization but not production tested.
Switching Characteristics
t
i
n
U
x
a
M
)
1
(
s
n
o
i
t
i
d
n
o
C
t
s
e
T
n
o
i
t
p
i
r
c
s
e
D
l
o
b
m
y
S
t
PLH
Propagation Delay A, B to Y
CL = 15pF
1.7
ns
t
PHL
Propagation Delay A, B to Y
CL = 15pF
1.7
ns
tr/tf
Rise/Fall Time
0.8V – 2.0V
0.8
ns
fmax
F
p
5
1
=
L
C
y
c
n
e
u
q
e
r
F
t
u
p
n
I
350
MHz
fmax
F
p
5
=
L
C
y
c
n
e
u
q
e
r
F
t
u
p
n
I
800
MHz
fmax
F
p
2
=
L
C
y
c
n
e
u
q
e
r
F
t
u
p
n
I
1000 MHz
Notes:
1. See test circuits and waveforms.
2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested.
3. Airflow of 1m/s is recommended for frequencies above 133MHz
TRIPLE 3-INPUT POSITIVE-NAND GATES
54, 74 Series Noise Cancellation GHz Logic
3
01/01/10
Potato Semiconductor Corporation
PO74G10A
www.potatosemi.com
Test Waveforms
Test Circuit
50Ohm
Propagation Delay
Input
Output
V
oH
2.0V
1.5V
0.8V
V
oL
3V
0V
1.5V
tf
tPHL
tPLH
tR
Vcc
15pF
to
2pF
D.U.T.
Pulse
Generator
TRIPLE 3-INPUT POSITIVE-NAND GATES
54, 74 Series Noise Cancellation GHz Logic
4
01/01/10
Potato Semiconductor Corporation
PO74G10A
www.potatosemi.com
Packaging Mechanical Drawing: 14 pin 150mil SOIC
Denotes dimensions in inches
Denotes dimensions in millimenters
X.XX
X.XX
X.XX
X.XX
0.010
0.007
0.25
0.17
0.050
0.016
1.27
0.40
0.244
0.228
6.20
5.80
TRIPLE 3-INPUT POSITIVE-NAND GATES
54, 74 Series Noise Cancellation GHz Logic
5
01/01/10
Potato Semiconductor Corporation
PO74G10A
www.potatosemi.com
Top-Marking
IC Ordering Information
Ordering Code
Package
14pin 150mil SOIC
Pb-free & Green
14pin 150mil SOIC
Pb-free & Green
PO74G10ASU for Tube
POTATO74G10AS
POTATO74G10AS
PO74G10ASR for Tape & Reel
-40 C to
-40 C to 125 C
TA
IC Package Information
PACKAGE
CODE
PACKAGE
TYPE
QTY
PER
TUBE
TAPE
WIDTH
(mm)
TAPE
PITCH
(mm)
PIN 1 LOCATION
TAPE TRAILER
LENGTH
QTY
PER REEL
TAPE LEADER
LENGTH
S
SOIC 14
16
8
Top Left Corner
39 (12”)
3000
64 (20”)
55
125 C