Description
74HCT138D Semiconductors Encoders, Decoders, Multiplexers & Demultiplexers 3-8 LINE DCOD/DMUX
The 74HCT138D is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The decoder accepts three binary weighted address inputs (A0, A1 and A3) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7).
The 74HCT138 features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the 74HC138; 74HCT138 to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HC138; 74HCT138 ICs and one inverter.
Features:
Demultiplexing capability
Multiple input enable for easy expansion
Complies with JEDEC standard no. 7A
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
ESD protection:
HBM EIA/JESD22-A114-C exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
Specified from -40 Cel to +85 Cel and from -40 Cel to +125 Cel
Specifications
Product Category: Encoders, Decoders, Multiplexers & Demultiplexers
RoHS: RoHS Compliant
Brand: NXP Semiconductors
Logic Family: 74HCT
Number of Bits: 3 bit
Number of Input Lines: 6 Input
Number of Output Lines: 8 Output
Propagation Delay Time: 17 ns
Supply Voltage – Max: 5.5 V
Supply Voltage – Min: 4.5 V
Maximum Operating Temperature: + 125 C
Mounting Style: SMD/SMT
Package / Case: SOT-109
Packaging: Reel
Logic Type: Decoder/Demultiplexer
Minimum Operating Temperature: – 40 C
Number of Circuits: 1 Circuit
Pd – Power Dissipation: 500 mW
Factory Pack Quantity: 2500
Part # Aliases: 74HCT138D-T
Manufacturer Part Number: 74HCT138D
NXP
