Description
AMD AM27C256-150DC IC 32K x8 EPROM
The Am27C256 is a 256-Kbit, ultraviolet erasable programmable read-only memory. It is organized as 32K words by 8 bits per word, operates from a single +5 V supply, has a static standby mode, and features fast single address location programming. Products are available in windowed ceramic DIP packages, as well as plastic one time programmable (OTP) PDIP and PLCC packages.
Fast access time Speed options as fast ns s Low power consumption 20 µA typical CMOS standby current s JEDEC-approved pinout s Single +5 V power supply s ±10% power supply tolerance standard s 100% FlashriteTM programming Typical programming time of 4 seconds s Latch-up protected 100 mA from V to VCC High noise immunity s Versatile features for simple interfacing Both CMOS and TTL input/output compatibility Two line control functions s Standard 28-pin DIP, PDIP, and 32-pin PLCC packages
The a 256-Kbit, ultraviolet erasable programmable read-only memory. It is organized as 32K words by 8 bits per word, operates from a single +5 V supply, has a static standby mode, and features fast single address location programming. Products are available in windowed ceramic DIP packages, as well as plastic one time programmable (OTP) PDIP and PLCC packages. Data can be typically accessed in less than 55 ns, allowing high-performance microprocessors to operate without any WAIT states. The device offers separate Output Enable (OE#) and Chip Enable (CE#) controls, thus eliminating bus contention in a multiple bus microprocessor system. AMD’s CMOS process technology provides high speed, low power, and high noise immunity. Typical power consumption is only mW in active mode, and µW in standby mode. All signals are TTL levels, including programming signals. Bit locations may be programmed singly, in blocks, or at random. The device supports AMD’s Flashrite programming algorithm (100 µs pulses), resulting in a typical programming time of 4 seconds.
VCC VSS VPP OE# CE# Output Enable Chip Enable and Prog Logic Y Decoder A0A14 Address Inputs Output Buffers Data Outputs DQ0DQ7
Max Access Time (ns) CE# (E#) Access (ns) OE# (G#) Access (ns)
Notes: 1. JEDEC nomenclature is in parenthesis. 2. Don’t use (DU) for PLCC.
A0A14 CE# (E#) DQ0DQ7 OE# (G#) VCC VPP VSS NC = Address Inputs = Chip Enable Input = Data Input/Outputs = Output Enable Input = VCC Supply Voltage = Program Voltage Input = Ground = No Internal Connection
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following:
OPTIONAL PROCESSING Blank = Standard Processing B = Burn-In TEMPERATURE RANGE C = Commercial I = Industrial E = Extended to +125°C) PACKAGE TYPE = 28-Pin Ceramic DIP (CDV028) SPEED OPTION See Product Selector Guide and Valid Combinations
Valid Combinations AM27C256-45 DC, DCB, DI, DIB AM27C256-200 AM27C256-255 VCC ± 5% DC, DCB, DI, DIB DC, DCB, DI, DIB, DE, DEB
Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations.
Manufacturer:AMD
Datasheet:Intel/am27c256.pdf
