Description
INTEL EE80C196MC Microprocessor 16 MHz 16 Bit SMT / SMD PLCC-84 RoHS
| Specifications | |
| Program Memory Size | – |
| RAM Size | 256 x 8 |
| Number of I /O | 53 |
| Package / Case | 84-PLCC |
| Speed | 16MHz |
| Oscillator Type | External |
| Packaging | Tube |
| Program Memory Type | ROMless |
| EEPROM Size | – |
| Core Processor | MCS 96 |
| Data Converters | A/D 13x10b |
| Core Size | 16-Bit |
| Operating Temperature | -40°C ~ 85°C |
| Connectivity | – |
| Peripherals | PWM, WDT |
| Voltage – Supply (Vcc/Vdd) | 4.5 V ~ 5.5 V |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
Features, Applications
87C196MC 16 Kbytes of On-Chip OTPROM 87C196MC ROM 16 Kbytes of On-Chip Factory-Programmed OTPROM 80C196MC ROMless
High-Performance CHMOS 16-Bit CPU 16 Kbytes of On-Chip OTPROM Factory-Programmed OTPROM 488 bytes of On-Chip Register RAM Register to Register Architecture I O Lines Peripheral Transaction Server (PTS) with 11 Prioritized Sources Event Processor Array (EPA) 4 High Speed Capture Compare Modules 4 High Speed Compare Modules Extended Temperature Standard
Two 16-Bit Timers with Quadrature Decoder Input 3-Phase Complementary Waveform Generator 13 Channel A D with Sample Hold with Zero Offset Adjustment W 14 Prioritized Interrupt Sources Flexible 8- 16-Bit External Bus x 16 Multiply 32 16 Divide Idle and Power Down Modes
The a 16-bit microcontroller designed primarily to control 3 phase AC induction and DC brushless motors The 8XC196MC is based on Intel’s MCS 96 16-bit microcontroller architecture and is manufactured with Intel’s CHMOS process The 8XC196MC has a three phase waveform generator specifically designed for use in “Inverter” motor control applications This peripheral allows for pulse width modulation three phase sine wave generation with minimal CPU intervention It generates 3 complementary non-overlapping PWM pulses with resolutions 125 ms (edge trigger) 250 ms (centered) The 8XC196MC has 16 Kbytes on-chip OTPROM ROM and 488 bytes of on-chip RAM It is available in three packages PLCC (84-L) SDIP (64-L) and EIAJ QFP (80-L) Note that the 64-L SDIP package does not include P5 1 and the CLKOUT pins Operational characteristics are guaranteed over the temperature range 85 C The 87C196MC contains 16 Kbytes on-chip OTPROM The 83C196MC contains 16 Kbytes on-chip ROM All references to the 80C196MC also refers to the 83C196MC and 87C196MC unless noted
OTPROM (One Time Programmable Read Only Memory) is the same as EPROM but it comes in an unwindowed package and cannot be erased It is user programmable
Other brands and names are the property of their respective owners Information in this document is provided in connection with Intel products Intel assumes no liability whatsoever including infringement of any patent or copyright for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products Intel retains the right to make changes to these specifications at any time without notice Microcomputer Products may have minor variations to this specification known as errata
NOTE Connections between the standard I O ports and the bus are not shown
This device is manufactured 5 a CHMOS III-E process Additional process and reliability information is available in the Intel® Quality System Handbook.
8XC196MC Memory Map Description External Memory I O Internal ROM EPROM or External Memory (Determined by EA) Reserved Must contain FFH (Note 5) PTS Vectors Upper Interrupt Vectors ROM EPROM Security Key
Reserved Must contain FFH (Note 5) Reserved Must Contain 20H (Note 5) CCB1 Reserved Must Contain 20H (Note 5) CCB0 Reserved Must contain FFH (Note 5) Lower Interrupt Vectors
EXAMPLE is 84-Lead PLCC OTPROM 16 MHz For complete package dimensional data refer to the Intel Packaging Handbook (Order Number 240800) NOTE 1 EPROMs are available as One Time Programmable (OTPROM) only
Figure 3 The 8XC196MC Family Nomenclature Thermal Characteristics Package Type PLCC QFP SDIP ija C W TBD ijc
SFR’s C W TBD 488 Bytes Register RAM (Note 1) CPU SFR’s (Notes 1 3) External Memory
All thermal impedance data is approximate for static air conditions 1W of power dissipation Values will change depending on operation conditions and application See the Intel Packaging Handbook (order number 240800) for a description of Intel’s thermal impedance test methodology
NOTES 1 Code executed in locations to 03FFH will be forced external 2 Reserved memory locations must contain 0FFH unless noted 3 Reserved SFR bit locations must contain 0 4 Refer to 8XC196KC for SFR descriptions 5 WARNING Reserved memory locations must not be written or read The contents and or function of these locations may change with future revisions of the device Therefore a program that relies on one or more of these locations may not function properly
Manufacturer:Intel
Datasheet:Intel/8XC196MC.pdf
